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NXP Semiconductors /LPC800 /I2C /INTENSET

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Interpret as INTENSET

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (THE_MSTPENDING_INTER)MSTPENDINGEN 0 (RESERVED)RESERVED 0 (THE_MSTARBLOSS_INTER)MSTARBLOSSEN 0 (RESERVED)RESERVED 0 (THE_MSTSTSTPERR_INTE)MSTSTSTPERREN 0 (RESERVED)RESERVED 0 (THE_SLVPENDING_INTER)SLVPENDINGEN 0 (RESERVED)RESERVED 0 (THE_SLVNOTSTR_INTERR)SLVNOTSTREN 0 (RESERVED)RESERVED 0 (THE_SLVDESEL_INTERRU)SLVDESELEN 0 (THE_MONRDY_INTERRUPT)MONRDYEN 0 (THE_MONOV_INTERRUPT_)MONOVEN 0 (RESERVED)RESERVED 0 (THE_MONIDLE_INTERRUP)MONIDLEEN 0 (RESERVED)RESERVED 0 (THE_EVENT_TIMEOUT_IN)EVENTTIMEOUTEN 0 (THE_SCL_TIMEOUT_INTE)SCLTIMEOUTEN 0 (RESERVED)RESERVED

SCLTIMEOUTEN=THE_SCL_TIMEOUT_INTE, MSTPENDINGEN=THE_MSTPENDING_INTER, SLVPENDINGEN=THE_SLVPENDING_INTER, MONRDYEN=THE_MONRDY_INTERRUPT, SLVDESELEN=THE_SLVDESEL_INTERRU, SLVNOTSTREN=THE_SLVNOTSTR_INTERR, MONIDLEEN=THE_MONIDLE_INTERRUP, MSTSTSTPERREN=THE_MSTSTSTPERR_INTE, MONOVEN=THE_MONOV_INTERRUPT_, EVENTTIMEOUTEN=THE_EVENT_TIMEOUT_IN, MSTARBLOSSEN=THE_MSTARBLOSS_INTER

Description

Interrupt Enable Set and read register.

Fields

MSTPENDINGEN

Master Pending interrupt Enable.

0 (THE_MSTPENDING_INTER): The MstPending interrupt is disabled.

1 (THE_MSTPENDING_INTER): The MstPending interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
MSTARBLOSSEN

Master Arbitration Loss interrupt Enable.

0 (THE_MSTARBLOSS_INTER): The MstArbLoss interrupt is disabled.

1 (THE_MSTARBLOSS_INTER): The MstArbLoss interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
MSTSTSTPERREN

Master Start/Stop Error interrupt Enable.

0 (THE_MSTSTSTPERR_INTE): The MstStStpErr interrupt is disabled.

1 (THE_MSTSTSTPERR_INTE): The MstStStpErr interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
SLVPENDINGEN

Slave Pending interrupt Enable.

0 (THE_SLVPENDING_INTER): The SlvPending interrupt is disabled.

1 (THE_SLVPENDING_INTER): The SlvPending interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
SLVNOTSTREN

Slave Not Stretching interrupt Enable.

0 (THE_SLVNOTSTR_INTERR): The SlvNotStr interrupt is disabled.

1 (THE_SLVNOTSTR_INTERR): The SlvNotStr interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
SLVDESELEN

Slave Deselect interrupt Enable.

0 (THE_SLVDESEL_INTERRU): The SlvDeSel interrupt is disabled.

1 (THE_SLVDESEL_INTERRU): The SlvDeSel interrupt is enabled.
MONRDYEN

Monitor data Ready interrupt Enable.

0 (THE_MONRDY_INTERRUPT): The MonRdy interrupt is disabled.

1 (THE_MONRDY_INTERRUPT): The MonRdy interrupt is enabled.
MONOVEN

Monitor Overrun interrupt Enable.

0 (THE_MONOV_INTERRUPT_): The MonOv interrupt is disabled.

1 (THE_MONOV_INTERRUPT_): The MonOv interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
MONIDLEEN

Monitor Idle interrupt Enable.

0 (THE_MONIDLE_INTERRUP): The MonIdle interrupt is disabled.

1 (THE_MONIDLE_INTERRUP): The MonIdle interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
EVENTTIMEOUTEN

Event Timeout interrupt Enable.

0 (THE_EVENT_TIMEOUT_IN): The Event Timeout interrupt is disabled.

1 (THE_EVENT_TIMEOUT_IN): The Event Timeout interrupt is enabled.
SCLTIMEOUTEN

SCL Timeout interrupt Enable.

0 (THE_SCL_TIMEOUT_INTE): The SCL Timeout interrupt is disabled.

1 (THE_SCL_TIMEOUT_INTE): The SCL Timeout interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data